The ultrathin gate dielectric has been emerged as one of the hardest challenges for further device scaling. Direct tunneling currents restrict the utilization of SiO2 films below approximately 1.5 nm thickness where tunneling currents larger than 1 A/cm2 are observed. Further reduction in thickness will increase tunneling current exponentially. Unacceptable gate leakage currents phase-out this gate dielectric material as early as the 0.1 μm CMOS process. The requirements summarized in the International Roadmap for Semiconductors (ITRS 1999) indicate the equivalent oxide thickness (EOT) progressing to substantially 1.0–1.5 nm for the 0.1 μm notes. No suitable alternative high dielectric constant material and interface layer has been identified with the stability and interface characteristics to serve as a gate dielectric.
To reduce the gate leakage current while maintaining the same gate capacitance, a thicker film with higher dielectric constant is required. Because the direct quantum-mechanical tunneling is exponentially dependent upon the dielectric thickness while the capacitance is only linearly dependent on thickness. For so-call high-K metal oxides, such as HfO2, ZrO2, Ta2O5, TiO2, unfortunately most of these materials have thermal stability issues. The formation of SiO2 and/or metal silicides takes place when they are deposited on the silicon. Post-deposition annealing is found to be necessary in efforts to further reduce gate leakage current and to densify the film. However, annealing causes the further growth of the SiO2 and silicide, which reduces the effectiveness of any high-K materials. Furthermore, these materials can't endure subsequent high-temperature source/drain and gate activation, which will crystallize the high-K films and thus results in large leakage increase. It is also not clear if any of these materials are compatible with poly-Si gate due to the chemical reactivity with the poly-Si. Therefore, the obstacles for high-K material are not only the discovery and development of a new material, but possibly a complete re-engineering of ever more complicated CMOS processing.
Nitrided oxide or nitride/oxide stack has been emerged as the promising candidate to replace conventional oxide for the urgent requirement in 0.1 μm notes. Nitride/oxide stack preserves the excellent Si/oxide interface and takes the advantages of nitride film. However, there still exists some problems including the significant amount of traps at the oxide/nitride interface and nitride bulk in conventional CVD nitride process, and nitrogen diffuses into and piles up at Si/SiO2 interface during the post-deposition annealing. These problems result in degradation of carrier mobility and become more severe when reducing base oxide thickness. An 8–10 Å oxide base layer has been reported as the optimized base oxide thickness. Further reducing the base oxide thickness results in poor Si/SiO2 interface and thus unacceptable performance degradation. The requirement of a base oxide restricts the down-scaling of nitride/oxide stack. Till now, high performance nitride/oxide stacks with EOT less than 15 Å have not been reported.
For nitrided oxide, many methods have been developed in the past time, such as N2O, NO nitridation, remote plasma nitridation (RPN) on deposited oxide. Oxide films that were either annealed in NO or N2O typically have total integrated nitrogen concentrations less then 1%. Such small amount of nitrogen concentration is desirable to improve channel hot-carrier degradation effects in transistor. However, it is insufficient to reduce the effects of boron penetration from P+ poly-Si gate into the gate dielectric, especially when oxide thickness down to less than 15 Å. Also, such a small nitrogen concentration didn't effectively reduce the EOT to solve the problem of excess high gate leakage current in ultrathin gate dielectric. Even more, it was observed that NO or N2O nitridation not only incorporated nitrogen within the film, but also increased the film thickness. In general, this was not viewed as a desirable effect for ultrathin oxide.
Remote plasma nitrided oxides, involving nitridation of thermally grown oxides with a remote high-density nitrogen discharge, are comprised of a thin layer of uniform and high nitrogen concentration at the poly/dielectric interface for an effective barrier to suppress boron diffusion. Through this nitridation, EOT can be effectively reduced due to an increase of dielectric constant. However, when oxide thickness becomes thinner, remote plasma nitridation meets a crucial bottleneck. High-energetic and active nitrogen will easily penetrate through ultrathin oxide, resulting in dramatic thickness increase and unacceptable mobility degradation. Radical induced reoxidation more than offset the EOT reduction from the nitrogen incorporation and limits the down-scaling of remote plasma nitrided oxide.